The power delivery systems (e.g., the network and signal return planes) of printed circuit boards, integrated circuit packages, and other systems, devices, and components, (e.g., interconnect components such as wire bonds and vias), are routinely tested for voltage noise. The power delivery network of a printed circuit board, for example, consists of Vcc (supply voltage) pads and ground pads and the power plane and ground plane, and/or conductive traces in or on the printed circuit board which lead to other pads or to a connector or the like. In general, power delivery networks transfer electrical power from a power supply to an electronic circuit. Generally speaking, for a given supply voltage, the more current the electronic circuit draws, the lower the impedance of the power delivery system must be over a specified frequency bandwidth to maintain a given amount of transient voltage switching noise. Furthermore, the more quickly the electronic circuit draws current through the power delivery system, the wider the frequency bandwidth must be in order to maintain a given amount of transient voltage switching noise. The same is true of return planes for signal paths, especially when the return current splits so that it is carried by more than one plane, or when the current in the return path changes layers from one plane to another. Typically the planes for the signal return path are the same as those used for power delivery. Therefore, the same considerations apply regarding the design and characterization of planes whether they are used as part of a power delivery network, a signal return path, or both.
As electronic circuits operate at faster speeds, and as printed circuit boards and integrated circuits become more complex, they require larger amounts of current. Furthermore, as supply voltages are decreased to reduce overall system power consumption, the maximum allowable impedance of the power delivery system is reduced and the bandwidth is increased. Therefore, the electrical performance of power delivery systems is becoming more critical to overall electronic system performance, and power delivery systems are simultaneously becoming increasingly challenging to design, measure, and characterize.
A typical approach to determining the electrical impedance requirement of a power delivery network is to divide the maximum allowable variation in the voltage at a terminal by the maximum change in the amount of current that is drawn from the power delivery network. The bandwidth over which this impedance must be maintained is typically determined by dividing a constant number by the amount of time allowed for the current to switch from its minimum value to its maximum value. The constant number is typically chosen to be approximately 0.35, but in practice can range from 0.2 to 1.0.
Although this technique is one commonly applied methodology to determine the electrical performance requirements of a power delivery network, it can be shown that this technique will always over-constrain the design of the power delivery network. The result is a device that is more expensive to design, a design which takes longer to complete, and a product which takes longer to bring to market than if the prior proper criteria were used. The increased costs are due to the increased amount of engineering design and measurement time, the increased bill-of-materials costs resulting from components which are not required, and the opportunity costs resulting from delays to the introduction of a new product to the market.
The principle problem with the currently used technique is that is mixes time domain and frequency domain performance requirements. The voltage noise transient is, by definition, defined in the time domain, as is the change in current supplied to a device. However, the power delivery system impedance is defined over a bandwidth and is therefore defined in the frequency domain. If does not follow then, in general, that dividing two terms that are functions of time (voltage and current) will result in a term that is a function of frequency, namely impedance.
In the prior art, one test port of a network analyzer could be used to inject a voltage signal into the power delivery system of a device under test (printed circuit board, integrated circuit package, or the like). Another test port of the network analyzer is used to measure the response of the device under test to determine the self-impedance of the power delivery system. An s-parameter matrix, known to those skilled in the art, is constructed based on the response of the power delivery system. The measured s-parameters allow the impedance of the power delivery system to be calculated as a function of frequency. Then, however, the calculated impedance as a function of frequency is improperly used to determine the transient noise. Since the specified current is in the time domain and the measured impedance is in the frequency domain, multiplying these two terms together is the equivalent of mismatching units (e.g., miles per hour added to pounds).
The result is that a device under test which does in fact meet a specified maximum voltage noise requirement is tested and incorrectly determined to exceed the specified maximum voltage noise. A redesign effort then must be conducted to lower the maximum voltage noise resulting in more expensive designs, designs which take longer to complete, and product which take longer to bring to market.
There is in fact the mathematical relationship between the time domain and the frequency domain representations of a parameter. The concept of a time domain representation of impedance, however, is not generally recognized and the application of such a concept is not described in the literature.